DDR3 SDRAM
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DDR3 SDRAM or double-data-rate three synchronous dynamic random access memory is the name of the new DDR memory standard that has been developed as the successor to DDR2 SDRAM.
The memory comes with a promise of a power consumption reduction of 40% compared to current commercial DDR2 modules, due to DDR3's 90 nm fabrication technology, allowing for lower operating currents and voltages (1.5 V, compared to DDR2's 1.8 V or DDR's 2.5 V). "Dual-gate" transistors will be used to reduce leakage of current.
DDR3's prefetch buffer width is 8 bit, whereas DDR2's is 4 bit, and DDR's is 2 bit.
Theoretically, these modules could transfer data at the effective clockrate of 800-1600MHz (for a single clock bandwidth of 400-800MHz), compared to DDR2's current range of 400-1066 MHz (200-533 MHz) or DDR's range of 200-600 MHz (100-300 MHz). To date, such bandwidth requirements have been mainly on the graphics market, where fast transfer of information between framebuffers is required.
Prototypes were announced in early 2005, while the DDR3 specification is expected to be publicly available in mid-2007. Supposedly, Intel has preliminarily announced that they expect to be able to offer support for it in mid 2007 with a version of their upcoming Bearlake chipset. AMD's roadmap indicates their own adoption of DDR3 to come in 2008.
DDR3 DIMMs have 240 pins, the same number as DDR2; however, the DIMMs are physically incompatible, owing to a different key notch location. [1]
The GDDR3 memory, with a similar name but an entirely dissimilar technology, has been in use for several years in high-end graphic cards such as ones from NVIDIA or ATI Technologies, and as main system memory on the Xbox 360. It is sometimes incorrectly referred to as "DDR3".
Spec standards (not finalized yet)
Chips
| Standard name | Memory clock | I/O Bus clock | Data transfers per second |
| DDR3-800 | 100 MHz | 400 MHz | 800 Million |
| DDR3-1066 | 133 MHz | 533 MHz | 1066 Million |
| DDR3-1333 | 166 MHz | 667 MHz | 1333 Million |
| DDR3-1600 | 200 MHz | 800 MHz | 1600 Million |
Sticks/Modules
| Module name | Bus clock | Chip type | Peak transfer rate |
| PC3-6400 | 400 MHz | DDR3-800 | 6.40 GB/s |
| PC3-8500 | 533 MHz | DDR3-1066 | 8.53 GB/s |
| PC3-10600 | 667 MHz | DDR3-1333 | 10.67 GB/s[2] |
| PC3-12800 | 800 MHz | DDR3-1600 | 12.80 GB/s |
Features
DDR3 SDRAM Components:
- Introduction of asynchronous RESET pin
- Support of system level flight time compensation
- On-DIMM Mirror friendly DRAM ballout
- Introduction of CWL (CAS Write Latency) per speed bin
- On-die IO calibration engine
- READ and WRITE calibration
DDR3 Modules:
- Fly-by command/address/control bus with On-DIMM termination
- High precision calibration resistors
Advantages compared to DDR2
- Higher bandwidth (up to 1600 MHz)
- Performance increase at low power
- Longer battery life in laptops
- Enhanced low power features and thermal design
Disadvantages compared to DDR2
- Commonly higher CAS Latency
- Lower MFIBS per Quad Cycle
References
- Raj Mahajan. "Memory Design Considerations When Migrating to DDR3 Interfaces from DDR2". MemCore Inc.
- Gregory Agostinelli. "Method and Apparatus for fine tuning a memory interface". US PATENT OFFICE.